Faster chip production, without a mask

Materials World magazine
,
1 Jan 2009
Close-up of a microchip

A maskless lithography technique that could enable fast and low-cost manufacture of semiconductors with nanoscale resolution has been developed by a European research team.

The PML2 (projection maskless lithography) method improves on traditional semiconductor systems that use a template or ‘mask’ to print a circuit design onto a silicon wafer. This masking technology is relatively expensive, as it can be time-consuming and require several masks for a single chip.

Led by Austrian manufacturer IMS Nanofabrication, the Radical Innovation Maskless Nanolithography (RIMANA) project foregoes the semiconductor mask by using an electron beam to write the circuit design directly onto the chip. The beam exposes the photosensitive resist of the substrate.

Maskless lithography has been explored before, but has often proved to be time-consuming, as a single beam is used to write the entire pattern, and it is often not small enough to create nanoscale features.

The RIMANA technique is able to get all the characteristics written-in simultaneously, and to a smaller scale, by splitting the beam into thousands of rays using an aperture plate and a blanking plate system, which deflects certain beams to create a specific pattern.

‘The blanking plate is one of the most novel aspects of PML2,’ says Gerhard Gross, CEO of IMS Nanofabrication. ‘It is an application-specific integrated circuit (ASIC) with over 40,000 holes and a deflection electrode at each hole. The electronics in the ASIC handles the data, and the beams going through the holes can be switched on and off by the deflection electrodes.’

The beams are split down to less than 20nm, meaning 16nm half-pitch circuits can be created on the chip’s surface.

The speed of the technology comes from direct writing and computer control. The system uses integrated complementary metal oxide semiconductor electronics to ‘write all the design data you send, it doesn’t matter how complicated it is or what changes to the pattern you make’, notes Gross.

While the prototype device is still slower than masked lithography, he says the group has worked out concepts for a device with a 100 wafer-per-hour throughput. This would allow for low-to-medium volume production.

The group is now working on a pre-commercialisation model as part of the Seventh Framework Programme MAGIC project (maskless lithography for IC manufacturing), which began in January 2008. It is hoping to have a commercial tool ready by 2011.

Further information: RIMANA